Senior Digital DFT Engineer

About the role

Join indie Semiconductor’s fast‑growing team in Rabat and lead the pre‑silicon DFT insertion and verification for cutting‑edge automotive and industrial ASICs. You will work closely with analog, mixed‑signal, and test engineering groups to ensure high‑quality test coverage and efficient silicon bring‑up.

Key responsibilities

• Define DFT requirements and architecture based on project specifications and IP content.
• Implement and verify standard DFT techniques such as Scan, LBIST, MBIST and Boundary Scan.
• Collaborate with analog and mixed‑signal designers to create custom test logic for time‑effective IP testing.
• Analyze chip and block test coverage, generate ATE test patterns, and develop custom functional patterns to improve coverage.
• Support post‑silicon ATE test program bring‑up and work on test time reduction.

Required profile

• 3+ years of industry experience in DFT/DFD implementation and verification for digital and mixed‑signal designs.
• Strong fundamental knowledge of DFT, core‑based test methodology, and scan isolation.
• Understanding of fault models (Stuck‑at, Transition, Path Delay, Gate‑Exhaustive, IDDQ, Cell‑Aware).
• MS degree in Electrical or Computer Engineering.
• Fluent English with excellent communication skills.

Required skills

• Scan, LBIST, MBIST, Boundary Scan
• JTAG, Scan Compression, ATPG, Fault Simulation, at‑speed testing
• SystemVerilog
• Test methodologies for mixed‑signal IPs (ADC, DAC, SerDes)
• UVM and assertion‑based verification