Senior Methodology Engineer – Physical Design Automation

About the role

We are seeking a highly motivated Senior Methodology Engineer to lead the development of advanced physical design automation, methodologies, and quality systems for complex SoC and ASIC projects. The role combines deep RTL‑to‑signoff flow expertise with software development to build scalable automation frameworks.

Key responsibilities

• Develop and maintain automation frameworks covering the full RTL‑to‑signoff physical design flow.
• Build methodology solutions for synthesis, floorplanning, power planning, placement, CTS, routing, timing closure, and sign‑off.
• Create quality checking, validation, and reporting systems for implementation and sign‑off metrics.
• Design scalable tools, scripts, and data pipelines to enhance productivity and optimize methodologies.
• Collaborate with Physical Design, STA, DFT, RTL, Library, and CAD teams to improve design quality.
• Drive continuous improvements in timing, power, area, congestion, IR/EM, and physical verification closure.

Required profile

• Bachelor's or Master's in Electrical/Electronics Engineering, Computer Engineering, or related field.
• 4+ years of experience in Physical Design, CAD methodology, or design automation.
• Strong understanding of ASIC/SoC implementation flow from RTL to GDSII sign‑off.
• Hands‑on experience with advanced technology nodes (7nm, 5nm, 3nm or below).

Required skills

• Programming: Python, Tcl, Perl, Shell, C++.
• Synopsys tools: Design Compiler, Fusion Compiler, IC Compiler II, PrimeTime, ICV.
• Cadence tools: Innovus, Tempus, Voltus, Pegasus.
• Siemens/Mentor tools: Calibre DRC, LVS, ERC.
• Automation: workflow development, data pipelines, quality dashboards, methodology deployment.